DESIGN AND IMPLEMENTATION OF A VHDL PROCESSOR FOR DCT BASED IMAGE COMPRESSION

Authors

Islam Md. Shabiul
Bhuyan M.S.
Beg M. Salim
Othman Masuri

Abstract

This paper describes the design and implementation of a VHDL processor meant for performing 2D-Discrete Cosine Transform (DCT) to use in image compression applications. The design flow starts from the system specification to implementation on silicon and the entire process is carried out using an advanced workstation based design environment for digital signal processing. The software allows the bit-true analysis to ensure that the designed VLSI processor satisfies the required specifications. The bit-true analysis is performed on all levels of abstraction (behavior, VHDL etc.). The motivation behind the work is smaller size chip area, faster processing, reducing the cost of the chip

Publication Date

11-16-2017

Recommended Citation

Shabiul, Islam Md.; M.S., Bhuyan; Salim, Beg M.; and Masuri, Othman (2017) "DESIGN AND IMPLEMENTATION OF A VHDL PROCESSOR FOR DCT BASED IMAGE COMPRESSION," ASEAN Journal on Science and Technology for Development: Vol. 24: No. 4, Article 8.
DOI: https://doi.org/10.29037/ajstd.211
Available at: https://ajstd.ubd.edu.bn/journal/vol24/iss4/8